new file mode 100644
@@ -0,0 +1,80 @@
+From 3502d8a4dd51b3bfe9b2fb123f0e8d6f7c0735ec Mon Sep 17 00:00:00 2001
+From: Nishanth Menon <nm@ti.com>
+Date: Tue, 25 Jul 2023 13:52:50 -0500
+Subject: [PATCH] TMP: board: ti: am62x: Add basic initialization for usb
+ voltage, 32k crystal, debounce
+
+Do the basic configuration required for setting up the USB core voltage
+configuration, setup to configure the 32k clock coming from 32k crystal
+and the debounce configurations for the various pins.
+
+See https://lore.kernel.org/u-boot/20230725185253.2123433-4-nm@ti.com/
+Changes since then: writel(val, reg) - fixed for debounce values
+
+Signed-off-by: Nishanth Menon <nm@ti.com>
+---
+ board/ti/am62x/evm.c | 46 ++++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 46 insertions(+)
+
+diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c
+index ad939088402..a1575c2b220 100644
+--- a/board/ti/am62x/evm.c
++++ b/board/ti/am62x/evm.c
+@@ -78,8 +78,54 @@ static int video_setup(void)
+ return 0;
+ }
+
++#define CTRLMMR_USB0_PHY_CTRL 0x43004008
++#define CTRLMMR_USB1_PHY_CTRL 0x43004018
++#define CORE_VOLTAGE 0x80000000
++
++#define WKUP_CTRLMMR_DBOUNCE_CFG1 0x04504084
++#define WKUP_CTRLMMR_DBOUNCE_CFG2 0x04504088
++#define WKUP_CTRLMMR_DBOUNCE_CFG3 0x0450408c
++#define WKUP_CTRLMMR_DBOUNCE_CFG4 0x04504090
++#define WKUP_CTRLMMR_DBOUNCE_CFG5 0x04504094
++#define WKUP_CTRLMMR_DBOUNCE_CFG6 0x04504098
++
+ void spl_board_init(void)
+ {
++ u32 val;
++
++ /* Set USB0 PHY core voltage to 0.85V */
++ val = readl(CTRLMMR_USB0_PHY_CTRL);
++ val &= ~(CORE_VOLTAGE);
++ writel(val, CTRLMMR_USB0_PHY_CTRL);
++
++ /* Set USB1 PHY core voltage to 0.85V */
++ val = readl(CTRLMMR_USB1_PHY_CTRL);
++ val &= ~(CORE_VOLTAGE);
++ writel(val, CTRLMMR_USB1_PHY_CTRL);
++
++ /* We have 32k crystal, so lets enable it */
++ val = readl(MCU_CTRL_LFXOSC_CTRL);
++ val &= ~(MCU_CTRL_LFXOSC_32K_DISABLE_VAL);
++ writel(val, MCU_CTRL_LFXOSC_CTRL);
++ /* Add any TRIM needed for the crystal here.. */
++ /* Make sure to mux up to take the SoC 32k from the crystal */
++ writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL,
++ MCU_CTRL_DEVICE_CLKOUT_32K_CTRL);
++
++ /* Setup debounce conf registers - arbitrary values. Times are approx */
++ /* 1.9ms debounce @ 32k */
++ writel(0x1, WKUP_CTRLMMR_DBOUNCE_CFG1);
++ /* 5ms debounce @ 32k */
++ writel(0x5, WKUP_CTRLMMR_DBOUNCE_CFG2);
++ /* 20ms debounce @ 32k */
++ writel(0x14, WKUP_CTRLMMR_DBOUNCE_CFG3);
++ /* 46ms debounce @ 32k */
++ writel(0x18, WKUP_CTRLMMR_DBOUNCE_CFG4);
++ /* 100ms debounce @ 32k */
++ writel(0x1c, WKUP_CTRLMMR_DBOUNCE_CFG5);
++ /* 156ms debounce @ 32k */
++ writel(0x1f, WKUP_CTRLMMR_DBOUNCE_CFG6);
++
+ video_setup();
+ enable_caches();
+ if (IS_ENABLED(CONFIG_SPL_SPLASH_SCREEN) && IS_ENABLED(CONFIG_SPL_BMP))
+--
+2.35.3
+
new file mode 100755
@@ -0,0 +1,34 @@
+#!/usr/bin/make -f
+
+# Debian rules for custom U-Boot build
+#
+# This software is a part of ISAR.
+# Copyright (c) Siemens AG, 2018-2024
+#
+# SPDX-License-Identifier: MIT
+
+ifneq ($(DEB_BUILD_GNU_TYPE),$(DEB_HOST_GNU_TYPE))
+export CROSS_COMPILE=$(DEB_HOST_GNU_TYPE)-
+SET_CROSS_BUILD_TOOLS=CROSS_BUILD_TOOLS=y
+endif
+
+override_dh_auto_build:
+ $(MAKE) $(PARALLEL_MAKE) ARCH=arm am62x_evm_r5_defconfig beagleplay_r5.config
+ $(MAKE) $(PARALLEL_MAKE) ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-
+
+ $(MAKE) $(PARALLEL_MAKE) am62x_evm_a53_defconfig beagleplay_a53.config
+ $(MAKE) $(PARALLEL_MAKE) BL31=/usr/lib/trusted-firmware-a/beagleplay/bl31.bin \
+ TEE=/usr/lib/optee-os/beagleplay/tee-raw.bin
+ $(MAKE) $(PARALLEL_MAKE) u-boot-initial-env
+ $(MAKE) $(PARALLEL_MAKE) $(SET_CROSS_BUILD_TOOLS) NO_SDL=1 tools-only envtools
+
+override_dh_auto_install:
+ mv tools/env/lib.a tools/env/libubootenv.a
+
+override_dh_auto_test:
+
+override_dh_strip:
+ dh_strip -X libubootenv.a
+
+%:
+ dh $@ --parallel
new file mode 100644
@@ -0,0 +1,41 @@
+#
+# Copyright (c) Siemens AG, 2023-2024
+#
+# SPDX-License-Identifier: MIT
+
+require recipes-bsp/u-boot/u-boot-custom.inc
+
+TI_FIRMWARE_SRCREV = "9ee2fedb1fb4815f54310dd872d34faf9948c7c1"
+
+SRC_URI += " \
+ https://ftp.denx.de/pub/u-boot/u-boot-${PV}.tar.bz2 \
+ https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/plain/ti-sysfw/ti-fs-firmware-am62x-gp.bin?id=${TI_FIRMWARE_SRCREV};downloadfilename=ti-fs-firmware-am62x-gp.bin;name=sysfw \
+ https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/plain/ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin?id=${TI_FIRMWARE_SRCREV};downloadfilename=ti-fs-stub-firmware-am62x-gp.bin;name=sysfw-stub \
+ https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/plain/ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f?id=${TI_FIRMWARE_SRCREV};downloadfilename=ipc_echo_testb_mcu1_0_release_strip.xer5f;name=dm \
+ file://0001-TMP-board-ti-am62x-Add-basic-initialization-for-usb-.patch \
+ file://rules-beagleplay"
+SRC_URI[sha256sum] = "b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3"
+SRC_URI[sysfw.sha256sum] = "be7008fdf60ea7ac72d36f57a29c6a1cc6b1aa01a595eae7b3e0e927aae78e2b"
+SRC_URI[sysfw-stub.sha256sum] = "1d5b23b8395037539c3b97eda2f3cc887ac2d6d0c834c9238fb727efc3c8a253"
+SRC_URI[dm.sha256sum] = "6d8a1d8a8ea430efcc6effe025865df1e5eeebf572273d97e9529781e1d04663"
+
+S = "${WORKDIR}/u-boot-${PV}"
+
+COMPATIBLE_MACHINE = "beagleplay"
+
+U_BOOT_BIN_INSTALL = "tiboot3-am62x-gp-evm.bin tispl.bin_unsigned u-boot.img_unsigned"
+
+DEPENDS += "trusted-firmware-a-beagleplay optee-os-beagleplay"
+DEBIAN_BUILD_DEPENDS =. "gcc-arm-linux-gnueabihf, \
+ libssl-dev:native, libssl-dev, \
+ swig, python3-dev:native, python3-setuptools, python3-pyelftools, \
+ python3-jsonschema:native, python3-yaml:native, \
+ trusted-firmware-a-beagleplay, optee-os-beagleplay,"
+
+do_prepare_build:append() {
+ mkdir -p ${S}/ti-sysfw
+ cp ${WORKDIR}/ti-fs-*firmware-am62x-gp.bin ${S}/ti-sysfw
+ mkdir -p ${S}/ti-dm/am62xx
+ cp ${WORKDIR}/ipc_echo_testb_mcu1_0_release_strip.xer5f ${S}/ti-dm/am62xx
+ cp ${WORKDIR}/rules-beagleplay ${S}/debian/rules
+}