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[192.35.17.2]) by gmr-mx.google.com with ESMTPS id a16si909367ejk.1.2020.10.13.00.50.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Oct 2020 00:50:32 -0700 (PDT) Received-SPF: pass (google.com: domain of jan.kiszka@siemens.com designates 192.35.17.2 as permitted sender) client-ip=192.35.17.2; Received: from mail2.sbs.de (mail2.sbs.de [192.129.41.66]) by thoth.sbs.de (8.15.2/8.15.2) with ESMTPS id 09D7oVCQ026898 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Tue, 13 Oct 2020 09:50:31 +0200 Received: from md1f2u6c.ad001.siemens.net ([167.87.21.249]) by mail2.sbs.de (8.15.2/8.15.2) with ESMTP id 09D7oTb2020807 for ; Tue, 13 Oct 2020 09:50:31 +0200 From: Jan Kiszka To: isar-users Subject: [PATCH 10/11] meta-isar: linux-mainline: Add patches for stm32mp15x target Date: Tue, 13 Oct 2020 09:50:27 +0200 Message-Id: <9d13cfec81be36ad4ce7f94cb8b6229281ab4a58.1602575428.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: References: MIME-Version: 1.0 X-Original-Sender: jan.kiszka@siemens.com X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of jan.kiszka@siemens.com designates 192.35.17.2 as permitted sender) smtp.mailfrom=jan.kiszka@siemens.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=siemens.com Precedence: list Mailing-list: list isar-users@googlegroups.com; contact isar-users+owners@googlegroups.com List-ID: X-Spam-Checked-In-Group: isar-users@googlegroups.com X-Google-Group-Id: 914930254986 List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: =?utf-8?q?1680422137704941323?= X-GMAIL-MSGID: =?utf-8?q?1680422137704941323?= From: Jan Kiszka These two patches are needed when activating OP-TEE for that target. Otherwise, Linux will access memory reserved for the trusted world and trigger a violation. See also https://www.mail-archive.com/u-boot@lists.denx.de/msg386171.html Signed-off-by: Jan Kiszka --- ...d-OP-TEE-node-and-its-reserved-memor.patch | 79 +++++++++++++++++++ ...move-reserve-memory-holes-on-stm32mp.patch | 65 +++++++++++++++ .../linux/linux-mainline_5.4.70.bb | 2 + 3 files changed, 146 insertions(+) create mode 100644 meta-isar/recipes-kernel/linux/files/0001-ARM-dts-stm32-add-OP-TEE-node-and-its-reserved-memor.patch create mode 100644 meta-isar/recipes-kernel/linux/files/0002-ARM-dts-stm32-remove-reserve-memory-holes-on-stm32mp.patch diff --git a/meta-isar/recipes-kernel/linux/files/0001-ARM-dts-stm32-add-OP-TEE-node-and-its-reserved-memor.patch b/meta-isar/recipes-kernel/linux/files/0001-ARM-dts-stm32-add-OP-TEE-node-and-its-reserved-memor.patch new file mode 100644 index 00000000..e40fe4ce --- /dev/null +++ b/meta-isar/recipes-kernel/linux/files/0001-ARM-dts-stm32-add-OP-TEE-node-and-its-reserved-memor.patch @@ -0,0 +1,79 @@ +From 3602c4835344fe2124406608fcec5737a176d7d8 Mon Sep 17 00:00:00 2001 +From: Etienne Carriere +Date: Fri, 8 Nov 2019 13:56:15 +0100 +Subject: [PATCH 1/2] ARM: dts: stm32: add OP-TEE node and its reserved-memory + node for stm32mp157 + +Adds firmware/optee node and adds a reserved-memory node named +optee for the DDR reserved to OP-TEE. + +SoC defines a default disabled OP-TEE node. +DK1 defines a default disabled OP-TEE reserved-memory node. +DK2 enables OP-TEE and its reserved memory. +ED1 defines a default disabled OP-TEE reserved-memory node and +enables OP-TEE node. + +Change-Id: I7b5d50a27a2a81b7cb510ae14ee96e975e41bb97 +Signed-off-by: Etienne Carriere +Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/linux-stm32/+/148795 +Tested-by: Alexandre TORGUE +Reviewed-by: Alexandre TORGUE +--- + arch/arm/boot/dts/stm32mp157a-dk1.dts | 6 ++++++ + arch/arm/boot/dts/stm32mp157c-dk2.dts | 8 ++++++++ + arch/arm/boot/dts/stm32mp157c.dtsi | 8 ++++++++ + 3 files changed, 22 insertions(+) + +diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts b/arch/arm/boot/dts/stm32mp157a-dk1.dts +index 0615d1c8a6fc..589d08bdffa0 100644 +--- a/arch/arm/boot/dts/stm32mp157a-dk1.dts ++++ b/arch/arm/boot/dts/stm32mp157a-dk1.dts +@@ -73,6 +73,12 @@ + reg = <0xd4000000 0x4000000>; + no-map; + }; ++ ++ optee_memory: optee@0xde000000 { ++ reg = <0xde000000 0x02000000>; ++ no-map; ++ status = "disabled"; ++ }; + }; + + led { +diff --git a/arch/arm/boot/dts/stm32mp157c-dk2.dts b/arch/arm/boot/dts/stm32mp157c-dk2.dts +index 20ea601a546d..9248ee3eb98a 100644 +--- a/arch/arm/boot/dts/stm32mp157c-dk2.dts ++++ b/arch/arm/boot/dts/stm32mp157c-dk2.dts +@@ -74,3 +74,11 @@ + }; + }; + }; ++ ++&optee_memory { ++ status = "okay"; ++}; ++ ++&optee { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi +index f98e0370c0bc..84d34120aab3 100644 +--- a/arch/arm/boot/dts/stm32mp157c.dtsi ++++ b/arch/arm/boot/dts/stm32mp157c.dtsi +@@ -1509,4 +1509,12 @@ + status = "disabled"; + }; + }; ++ ++ firmware { ++ optee: optee { ++ compatible = "linaro,optee-tz"; ++ method = "smc"; ++ status = "disabled"; ++ }; ++ }; + }; +-- +2.26.2 + diff --git a/meta-isar/recipes-kernel/linux/files/0002-ARM-dts-stm32-remove-reserve-memory-holes-on-stm32mp.patch b/meta-isar/recipes-kernel/linux/files/0002-ARM-dts-stm32-remove-reserve-memory-holes-on-stm32mp.patch new file mode 100644 index 00000000..99860f45 --- /dev/null +++ b/meta-isar/recipes-kernel/linux/files/0002-ARM-dts-stm32-remove-reserve-memory-holes-on-stm32mp.patch @@ -0,0 +1,65 @@ +From a7eb535f0f1c818202b0a0a8ec2aee506a0114e7 Mon Sep 17 00:00:00 2001 +From: Alexandre Torgue +Date: Fri, 29 Nov 2019 18:30:37 +0100 +Subject: [PATCH 2/2] ARM: dts: stm32: remove reserve memory holes on + stm32mp157 boards + +This commit removes hole between GPU and OPTEE reserve memory in order to +optimize Linux memory management. + +Signed-off-by: Alexandre Torgue +Change-Id: I4461085fd34139ee1b88c5f5116dd5c1de0e10ac +Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/linux-stm32/+/151463 +Reviewed-by: CITOOLS +Reviewed-by: CIBUILD +--- + arch/arm/boot/dts/stm32mp157a-dk1.dts | 4 ++-- + arch/arm/boot/dts/stm32mp157c-ed1.dts | 13 +++++++++++-- + 2 files changed, 13 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts b/arch/arm/boot/dts/stm32mp157a-dk1.dts +index 589d08bdffa0..da762b301d72 100644 +--- a/arch/arm/boot/dts/stm32mp157a-dk1.dts ++++ b/arch/arm/boot/dts/stm32mp157a-dk1.dts +@@ -69,8 +69,8 @@ + no-map; + }; + +- gpu_reserved: gpu@d4000000 { +- reg = <0xd4000000 0x4000000>; ++ gpu_reserved: gpu@da000000 { ++ reg = <0xda000000 0x4000000>; + no-map; + }; + +diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts b/arch/arm/boot/dts/stm32mp157c-ed1.dts +index 1d426ea8bdaf..4e0f665c5810 100644 +--- a/arch/arm/boot/dts/stm32mp157c-ed1.dts ++++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts +@@ -64,8 +64,13 @@ + no-map; + }; + +- gpu_reserved: gpu@e8000000 { +- reg = <0xe8000000 0x8000000>; ++ gpu_reserved: gpu@f6000000 { ++ reg = <0xf6000000 0x8000000>; ++ no-map; ++ }; ++ ++ optee_memory: optee@0xfe000000 { ++ reg = <0xfe000000 0x02000000>; + no-map; + }; + }; +@@ -329,3 +334,7 @@ + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18>; + }; ++ ++&optee { ++ status = "okay"; ++}; +-- +2.26.2 + diff --git a/meta-isar/recipes-kernel/linux/linux-mainline_5.4.70.bb b/meta-isar/recipes-kernel/linux/linux-mainline_5.4.70.bb index 209ad9c0..91eb4463 100644 --- a/meta-isar/recipes-kernel/linux/linux-mainline_5.4.70.bb +++ b/meta-isar/recipes-kernel/linux/linux-mainline_5.4.70.bb @@ -11,6 +11,8 @@ ARCHIVE_VERSION = "${@ d.getVar('PV')[:-2] if d.getVar('PV').endswith('.0') else SRC_URI += " \ https://cdn.kernel.org/pub/linux/kernel/v5.x/linux-${ARCHIVE_VERSION}.tar.xz \ + file://0001-ARM-dts-stm32-add-OP-TEE-node-and-its-reserved-memor.patch \ + file://0002-ARM-dts-stm32-remove-reserve-memory-holes-on-stm32mp.patch \ file://x86_64_defconfig \ file://no-ubifs-fs.cfg \ file://no-root-nfs.cfg;apply=no"